ATMEGA32A-AUR
The low-power, high-performance Microchip 8-bit AVR® RISC-based microcontroller featuring 32 KB self-programming Flash program memory, 2 KB SRAM, 1 KB EEPROM, 8-channel 10-bit A/D converter and JTAG interface for on-chip-debug. The device achieves 16 MIPS throughput at 16 MHz at 2.7-5.5V operation.
By executing powerful instructions in a single clock cycle, the device achieves throughputs approaching one MIPS per MHz, allowing you to optimize power consumption versus processing speed.
131 Powerful Instructions - Most Single-clock Cycle Execution
32 × 8 General Purpose Working Registers
Fully Static Operation
Up to 16 MIPS Throughput at 16 MHz
On-Chip Two-Cycle Multiplier
32 KB of In-System Self-programmable Flash program memory
1 KB EEPROM
2 KB Internal SRAM
Write/Erase cycles: 10,000 Flash/100,000 EEPROM
Data Retention: 20 years at 85°C/100 years at 25°C
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
Programming Lock for Software Security
JTAG (IEEE std. 1149.1 Compliant) Interface
Boundary-scan Capabilities According to the JTAG Standard
Extensive On-chip Debug SupportProgramming of Flash, EEPROM, Fuses and Lock Bits through the JTAG Interface
QTouch library support
Capacitive touch buttons, sliders and wheels
QTouch and QMatrix acquisition
Up to 64 sense channels
Parametrics
| Program Memory Type | Flash |
| Program Memory Size (KB) | 32 |
| CPU Speed (MIPS/DMIPS) | 16 |
| Data EEPROM (bytes) | 1024 |
| Timers | 2 x 8-bit - 1 x 16-bit |
| Stand alone PWM | 4 |
| Number of ADCs | 0 |
| Diff ADC Inputs | 7 |
| ADC Channels | 8 |
| Max ADC Resolution (bits) | 10 |
| Number of Comparators | 1 |
| Temp. Range Min. | -40 |
| Temp. Range Max. | 85 |
| Operation Voltage Max.(V) | 5.5 |
| Operation Voltage Min.(V) | 2.7 |
| Pin Count | 44 |
| Low Power | No |
| I2C | 1 -I2C |
ATMEGA32A-AUR
The low-power, high-performance Microchip 8-bit AVR® RISC-based microcontroller featuring 32 KB self-programming Flash program memory, 2 KB SRAM, 1 KB EEPROM, 8-channel 10-bit A/D converter and JTAG interface for on-chip-debug. The device achieves 16 MIPS throughput at 16 MHz at 2.7-5.5V operation.
By executing powerful instructions in a single clock cycle, the device achieves throughputs approaching one MIPS per MHz, allowing you to optimize power consumption versus processing speed.
131 Powerful Instructions - Most Single-clock Cycle Execution
32 × 8 General Purpose Working Registers
Fully Static Operation
Up to 16 MIPS Throughput at 16 MHz
On-Chip Two-Cycle Multiplier
32 KB of In-System Self-programmable Flash program memory
1 KB EEPROM
2 KB Internal SRAM
Write/Erase cycles: 10,000 Flash/100,000 EEPROM
Data Retention: 20 years at 85°C/100 years at 25°C
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
Programming Lock for Software Security
JTAG (IEEE std. 1149.1 Compliant) Interface
Boundary-scan Capabilities According to the JTAG Standard
Extensive On-chip Debug SupportProgramming of Flash, EEPROM, Fuses and Lock Bits through the JTAG Interface
QTouch library support
Capacitive touch buttons, sliders and wheels
QTouch and QMatrix acquisition
Up to 64 sense channels
Parametrics
| Program Memory Type | Flash |
| Program Memory Size (KB) | 32 |
| CPU Speed (MIPS/DMIPS) | 16 |
| Data EEPROM (bytes) | 1024 |
| Timers | 2 x 8-bit - 1 x 16-bit |
| Stand alone PWM | 4 |
| Number of ADCs | 0 |
| Diff ADC Inputs | 7 |
| ADC Channels | 8 |
| Max ADC Resolution (bits) | 10 |
| Number of Comparators | 1 |
| Temp. Range Min. | -40 |
| Temp. Range Max. | 85 |
| Operation Voltage Max.(V) | 5.5 |
| Operation Voltage Min.(V) | 2.7 |
| Pin Count | 44 |
| Low Power | No |
| I2C | 1 -I2C |
