80 MHz/105 DMIPS performance

Integrated 10/100 Mbps Ethernet MAC

Dedicated DMA interface for direct access to the entire system RAM

Industry-standard RMII/MII interface to PHY

Pre-programmed MAC address

Full speed USB

Rich peripheral set

80MHz/105DMIPS, 32-bit MIPS M4K® Core

USB 2.0 On-The-Go Peripheral with integrated PHY

10/100 Ethernet MAC with MII/RMII Interfaces

2 x CAN2.0b modules with 1024 buffers

8 Dedicated DMA Channels for USB OTG, Ethernet, and CAN

5 Stage pipeline, Harvard architecture

MIPS16e mode for up to 40% smaller code size

Single cycle multiply and hardware divide unit

32 x 32-bit Core Registers

32 x 32-bit Shadow Registers

Fast context switch and interrupt response

512K Flash (plus 12K boot Flash)

128K RAM (can execute from RAM)

8 Channel General Hardware DMA Controller

Flash prefetch module with 256 Byte cache

Lock instructions or data in cache for fast access

Programmable vector interrupt controller

Fast and Accurate 16 channel 10-bit ADC,

Max 1 Mega sample per second at +/- 1LSB, conversion available during SLEEP & IDLE

RUN, IDLE, and SLEEP modes

Multiple switchable clock modes for each power mode, enables optimum power settings

iFlow Trace: Non-intrusive Hardware Instruction Trace port (5 Wires)

8 hardware breakpoints (6 Instruction and 2 Data)

2 wire programming and debugging interface

JTAG interface supporting Programming, Debugging and Boundary scan

Fail-Safe Clock Monitor - allows safe shutdown if clock fails

2 Internal oscillators (8MHz & 31KHz)

Hardware RTCC (Real-Time Clock and Calendar with Alarms)

Watchdog Timer with separate RC oscillator

Pin compatible with 16-bit PIC® MCUs

Serial Communication Modules allow flexible UART/SPI/I2C™ configuration

80 MHz/105 DMIPS performance

Integrated 10/100 Mbps Ethernet MAC

Dedicated DMA interface for direct access to the entire system RAM

Industry-standard RMII/MII interface to PHY

Pre-programmed MAC address

Full speed USB

Rich peripheral set

80MHz/105DMIPS, 32-bit MIPS M4K® Core

USB 2.0 On-The-Go Peripheral with integrated PHY

10/100 Ethernet MAC with MII/RMII Interfaces

2 x CAN2.0b modules with 1024 buffers

8 Dedicated DMA Channels for USB OTG, Ethernet, and CAN

5 Stage pipeline, Harvard architecture

MIPS16e mode for up to 40% smaller code size

Single cycle multiply and hardware divide unit

32 x 32-bit Core Registers

32 x 32-bit Shadow Registers

Fast context switch and interrupt response

512K Flash (plus 12K boot Flash)

128K RAM (can execute from RAM)

8 Channel General Hardware DMA Controller

Flash prefetch module with 256 Byte cache

Lock instructions or data in cache for fast access

Programmable vector interrupt controller

Fast and Accurate 16 channel 10-bit ADC,

Max 1 Mega sample per second at +/- 1LSB, conversion available during SLEEP & IDLE

RUN, IDLE, and SLEEP modes

Multiple switchable clock modes for each power mode, enables optimum power settings

iFlow Trace: Non-intrusive Hardware Instruction Trace port (5 Wires)

8 hardware breakpoints (6 Instruction and 2 Data)

2 wire programming and debugging interface

JTAG interface supporting Programming, Debugging and Boundary scan

Fail-Safe Clock Monitor - allows safe shutdown if clock fails

2 Internal oscillators (8MHz & 31KHz)

Hardware RTCC (Real-Time Clock and Calendar with Alarms)

Watchdog Timer with separate RC oscillator

Pin compatible with 16-bit PIC® MCUs

Serial Communication Modules allow flexible UART/SPI/I2C™ configuration