PIC18F26Q84-I/SS

The PIC18-Q84 family expands the 8-bit MCUs by combining an extensive array of Core Independent Peripherals (CIPs) with Controller Area Network Flexible Data Rate (CAN FD). These cost optimized MCUs contain time-saving CIPs in up to 48-pins with up to 128 KB of flash memory. The family introduces new features and peripherals like the Universal Timer (UTMR) with customization capability; context switching added to the 12-bit ADC with Computation for automating analog signal analysis for real-time system response. Additionally, it includes industry standard options, JTAG Boundary Scan, 32-bit Cyclic Redundancy Check (CRC) with memory scan on boot for added system safety. System designers can benefit greatly by saving time, as it is significantly easier to configure a hardware-based peripheral, as opposed to writing and validating an entire software routine, to accomplish a task. 

PIC18F26Q84-I/SS

Product Features

CAN Flexible Data-Rate (FD) module:

• Functional in CAN FD or CAN 2.0B modes

• Eight Direct Memory Access (DMA) Controllers:

• Data transfers capabilities

• User programmable source and destination sizes

• Hardware and software triggered data transfers

Vectored Interrupt Capability:

• Selectable high/low priority

• Fixed interrupt latency of three instruction cycles

• Programmable vector table base address

• Backwards compatible with previous interrupt capabilities

Analog-to-Digital Converter with Computation and Context Switching (ADC):

• Automated math functions on input signals:

• Averaging, filter calculations, oversampling and threshold comparison

• 4 Separate Contexts (settings and results) saved and accessible separately

• Contexts can be accessed through firmware or DMA

• Five internal analog channels

• Hardware Capacitive Voltage Divider (CVD) Support:

• Adjustable sample and hold capacitor array

• Automates touch sampling and reduces software size and CPU usage when touch or proximity

Universal Timer (UTMR)

• Two Customizable 16-bit Timers - Combine to create larger bit timer

8-Bit Digital-to-Analog Converter (DAC):

Two Comparators (CMP):

Four 16-Bit Pulse-Width Modulators (PWM):

Data Signal Modulator (DSM):

Programmable CRC with Memory Scan:

• Reliable data/program memory monitoring for Fail-Safe operation (e.g., Class B)

• Calculate 32-bit CRC over any portion of Program Flash Memory

Communication:

Five UART modules:

• LIN master and slave, DMX mode, DALI gear and device protocols

• SPI / I2C

Doze: CPU and Peripherals Running at Different Cycle Rates (typically CPU is lower)

Idle: CPU Halted While Peripherals Operate

Sleep: Lowest Power Consumption

Peripheral Module Disable (PMD):

• Ability to selectively disable hardware module to minimize active power consumption of unused peripherals

JTAG: Supports boundary scan

Functional Safety

• IEC 60730 Class B library (UL certified)

• ISO 26262 FMEDA (ASIL B Ready certified by SGS TÜV)

• ISO 26262 Safety Manual (ASIL B Ready certified by SGS TÜV)

• ISO 26262 software diagnostics (certification pending)

• IEC 61508 FMEDA

• IEC 61508 Safety Manual (ultimo 2021)

• MPLAB XC8 Functional Safety Pro compiler

Parametrics